772 lines
26 KiB
C++
772 lines
26 KiB
C++
//
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// Created by Selim Mustafaev on 11.08.2023.
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//
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#include "Cpu.h"
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#include <iostream>
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#include <format>
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namespace nes {
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Cpu::Cpu(): _ticks{}, A{}, X{}, Y{}, PC{}, SP{}, flags{} {
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_bus = std::make_unique<Bus>();
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_instructions = std::vector<Instruction>(256);
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_instructions[0x00] = {"BRK", &Cpu::BRK, &Cpu::IMP, 7, false};
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_instructions[0x01] = {"ORA", &Cpu::ORA, &Cpu::IZX, 6, false};
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_instructions[0x05] = {"ORA", &Cpu::ORA, &Cpu::ZP0, 3, false};
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_instructions[0x06] = {"ASL", &Cpu::ASL, &Cpu::ZP0, 5, false};
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_instructions[0x09] = {"ORA", &Cpu::ORA, &Cpu::IMM, 2, false};
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_instructions[0x0A] = {"ASL", &Cpu::ASL_ACC, &Cpu::IMP, 2, false};
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_instructions[0x0D] = {"ORA", &Cpu::ORA, &Cpu::ABS, 4, false};
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_instructions[0x11] = {"ORA", &Cpu::ORA, &Cpu::IZY, 5, true};
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_instructions[0x19] = {"ORA", &Cpu::ORA, &Cpu::ABY, 4, true};
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_instructions[0x15] = {"ORA", &Cpu::ORA, &Cpu::ZPX, 4, false};
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_instructions[0x1D] = {"ORA", &Cpu::ORA, &Cpu::ABX, 4, true};
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_instructions[0x0E] = {"ASL", &Cpu::ASL, &Cpu::ABS, 6, false};
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_instructions[0x16] = {"ASL", &Cpu::ASL, &Cpu::ZPX, 6, false};
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_instructions[0x1E] = {"ASL", &Cpu::ASL, &Cpu::ABX, 7, false};
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_instructions[0x21] = {"AND", &Cpu::AND, &Cpu::IZX, 6, false};
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_instructions[0x25] = {"AND", &Cpu::AND, &Cpu::ZP0, 3, false};
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_instructions[0x29] = {"AND", &Cpu::AND, &Cpu::IMM, 2, false};
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_instructions[0x2D] = {"AND", &Cpu::AND, &Cpu::ABS, 4, false};
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_instructions[0x31] = {"AND", &Cpu::AND, &Cpu::IZY, 5, true};
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_instructions[0x35] = {"AND", &Cpu::AND, &Cpu::ZPX, 4, false};
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_instructions[0x39] = {"AND", &Cpu::AND, &Cpu::ABY, 4, true};
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_instructions[0x3D] = {"AND", &Cpu::AND, &Cpu::ABX, 4, true};
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_instructions[0x41] = {"EOR", &Cpu::EOR, &Cpu::IZX, 6, false};
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_instructions[0x45] = {"EOR", &Cpu::EOR, &Cpu::ZP0, 3, false};
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_instructions[0x49] = {"EOR", &Cpu::EOR, &Cpu::IMM, 2, false};
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_instructions[0x4D] = {"EOR", &Cpu::EOR, &Cpu::ABS, 4, false};
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_instructions[0x51] = {"EOR", &Cpu::EOR, &Cpu::IZY, 5, true};
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_instructions[0x55] = {"EOR", &Cpu::EOR, &Cpu::ZPX, 4, false};
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_instructions[0x59] = {"EOR", &Cpu::EOR, &Cpu::ABY, 4, true};
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_instructions[0x5D] = {"EOR", &Cpu::EOR, &Cpu::ABX, 4, true};
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_instructions[0x61] = {"ADC", &Cpu::ADC, &Cpu::IZX, 6, false};
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_instructions[0x65] = {"ADC", &Cpu::ADC, &Cpu::ZP0, 3, false};
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_instructions[0x6D] = {"ADC", &Cpu::ADC, &Cpu::ABS, 4, false};
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_instructions[0x69] = {"ADC", &Cpu::ADC, &Cpu::IMM, 2, false};
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_instructions[0x71] = {"ADC", &Cpu::ADC, &Cpu::IZY, 5, true};
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_instructions[0x75] = {"ADC", &Cpu::ADC, &Cpu::ZPX, 4, false};
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_instructions[0x79] = {"ADC", &Cpu::ADC, &Cpu::ABY, 4, true};
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_instructions[0x7D] = {"ADC", &Cpu::ADC, &Cpu::ABX, 4, true};
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_instructions[0xA2] = {"LDX", &Cpu::LDX, &Cpu::IMM, 2, false};
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_instructions[0xA6] = {"LDX", &Cpu::LDX, &Cpu::ZP0, 3, false};
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_instructions[0xAE] = {"LDX", &Cpu::LDX, &Cpu::ABS, 4, false};
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_instructions[0xB6] = {"LDX", &Cpu::LDX, &Cpu::ZPY, 4, false};
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_instructions[0xBE] = {"LDX", &Cpu::LDX, &Cpu::ABY, 4, true};
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_instructions[0x86] = {"STX", &Cpu::STX, &Cpu::ZP0, 3, false};
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_instructions[0x8E] = {"STX", &Cpu::STX, &Cpu::ABS, 4, false};
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_instructions[0x96] = {"STX", &Cpu::STX, &Cpu::ZPY, 4, false};
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_instructions[0xA4] = {"LDY", &Cpu::LDY, &Cpu::ZP0, 3, false};
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_instructions[0xAC] = {"LDY", &Cpu::LDY, &Cpu::ABS, 4, false};
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_instructions[0xA0] = {"LDY", &Cpu::LDY, &Cpu::IMM, 2, false};
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_instructions[0xB4] = {"LDY", &Cpu::LDY, &Cpu::ZPX, 4, false};
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_instructions[0xBC] = {"LDY", &Cpu::LDY, &Cpu::ABX, 4, true};
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_instructions[0xA1] = {"LDA", &Cpu::LDA, &Cpu::IZX, 6, false};
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_instructions[0xA5] = {"LDA", &Cpu::LDA, &Cpu::ZP0, 3, false};
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_instructions[0xA9] = {"LDA", &Cpu::LDA, &Cpu::IMM, 2, false};
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_instructions[0xAD] = {"LDA", &Cpu::LDA, &Cpu::ABS, 4, false};
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_instructions[0xB1] = {"LDA", &Cpu::LDA, &Cpu::IZY, 5, true};
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_instructions[0xB5] = {"LDA", &Cpu::LDA, &Cpu::ZPX, 4, false};
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_instructions[0xB9] = {"LDA", &Cpu::LDA, &Cpu::ABY, 4, true};
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_instructions[0xBD] = {"LDA", &Cpu::LDA, &Cpu::ABX, 4, true};
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_instructions[0x18] = {"CLC", &Cpu::CLC, &Cpu::IMP, 2, false};
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_instructions[0x88] = {"DEY", &Cpu::DEY, &Cpu::IMP, 2, false};
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_instructions[0xD0] = {"BNE", &Cpu::BNE, &Cpu::REL, 2, false};
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_instructions[0x81] = {"STA", &Cpu::STA, &Cpu::IZX, 6, false};
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_instructions[0x8D] = {"STA", &Cpu::STA, &Cpu::ABS, 4, false};
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_instructions[0x91] = {"STA", &Cpu::STA, &Cpu::IZY, 6, false};
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_instructions[0x95] = {"STA", &Cpu::STA, &Cpu::ZPX, 4, false};
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_instructions[0x99] = {"STA", &Cpu::STA, &Cpu::ABY, 5, false};
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_instructions[0x9D] = {"STA", &Cpu::STA, &Cpu::ABX, 5, false};
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_instructions[0xEA] = {"NOP", &Cpu::NOP, &Cpu::IMP, 2, false};
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_instructions[0x78] = {"SEI", &Cpu::SEI, &Cpu::IMP, 2, false};
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_instructions[0xD8] = {"CLD", &Cpu::CLD, &Cpu::IMP, 2, false};
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_instructions[0x9A] = {"TXS", &Cpu::TXS, &Cpu::IMP, 2, false};
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_instructions[0x10] = {"BPL", &Cpu::BPL, &Cpu::REL, 2, false};
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_instructions[0x4C] = {"JMP", &Cpu::JMP, &Cpu::ABS, 3, false};
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_instructions[0x6C] = {"JMP", &Cpu::JMP, &Cpu::IND, 5, false};
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_instructions[0x20] = {"JSR", &Cpu::JSR, &Cpu::ABS, 6, false};
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_instructions[0x38] = {"SEC", &Cpu::SEC, &Cpu::IMP, 2, false};
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_instructions[0xB0] = {"BCS", &Cpu::BCS, &Cpu::REL, 2, false};
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_instructions[0x90] = {"BCC", &Cpu::BCC, &Cpu::REL, 2, false};
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_instructions[0xF0] = {"BEQ", &Cpu::BEQ, &Cpu::REL, 2, false};
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_instructions[0x85] = {"STA", &Cpu::STA, &Cpu::ZP0, 3, false};
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_instructions[0x24] = {"BIT", &Cpu::BIT, &Cpu::ZP0, 3, false};
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_instructions[0x2C] = {"BIT", &Cpu::BIT, &Cpu::ABS, 4, false};
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_instructions[0x70] = {"BVS", &Cpu::BVS, &Cpu::REL, 2, false};
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_instructions[0x50] = {"BVC", &Cpu::BVC, &Cpu::REL, 2, false};
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_instructions[0x60] = {"RTS", &Cpu::RTS, &Cpu::IMP, 6, false};
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_instructions[0xF8] = {"SED", &Cpu::SED, &Cpu::IMP, 2, false};
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_instructions[0x08] = {"PHP", &Cpu::PHP, &Cpu::IMP, 3, false};
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_instructions[0x68] = {"PLA", &Cpu::PLA, &Cpu::IMP, 4, false};
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_instructions[0xC1] = {"CMP", &Cpu::CMP, &Cpu::IZX, 6, false};
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_instructions[0xC5] = {"CMP", &Cpu::CMP, &Cpu::ZP0, 3, false};
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_instructions[0xC9] = {"CMP", &Cpu::CMP, &Cpu::IMM, 2, false};
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_instructions[0xCD] = {"CMP", &Cpu::CMP, &Cpu::ABS, 4, false};
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_instructions[0xD1] = {"CMP", &Cpu::CMP, &Cpu::IZY, 5, true};
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_instructions[0xD5] = {"CMP", &Cpu::CMP, &Cpu::ZPX, 4, false};
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_instructions[0xD9] = {"CMP", &Cpu::CMP, &Cpu::ABY, 4, true};
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_instructions[0xDD] = {"CMP", &Cpu::CMP, &Cpu::ABX, 4, true};
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_instructions[0x30] = {"BMI", &Cpu::BMI, &Cpu::REL, 2, false};
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_instructions[0x48] = {"PHA", &Cpu::PHA, &Cpu::IMP, 3, false};
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_instructions[0x28] = {"PLP", &Cpu::PLP, &Cpu::IMP, 4, false};
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_instructions[0xB8] = {"CLV", &Cpu::CLV, &Cpu::IMP, 2, false};
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_instructions[0xC0] = {"CPY", &Cpu::CPY, &Cpu::IMM, 2, false};
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_instructions[0xC4] = {"CPY", &Cpu::CPY, &Cpu::ZP0, 3, false};
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_instructions[0xCC] = {"CPY", &Cpu::CPY, &Cpu::ABS, 4, false};
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_instructions[0xE0] = {"CPX", &Cpu::CPX, &Cpu::IMM, 2, false};
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_instructions[0xE4] = {"CPX", &Cpu::CPX, &Cpu::ZP0, 3, false};
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_instructions[0xEC] = {"CPX", &Cpu::CPX, &Cpu::ABS, 4, false};
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_instructions[0xE1] = {"SBC", &Cpu::SBC, &Cpu::IZX, 6, false};
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_instructions[0xE5] = {"SBC", &Cpu::SBC, &Cpu::ZP0, 3, false};
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_instructions[0xE9] = {"SBC", &Cpu::SBC, &Cpu::IMM, 2, false};
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_instructions[0xED] = {"SBC", &Cpu::SBC, &Cpu::ABS, 4, false};
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_instructions[0xF1] = {"SBC", &Cpu::SBC, &Cpu::IZY, 5, true};
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_instructions[0xF5] = {"SBC", &Cpu::SBC, &Cpu::ZPX, 4, false};
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_instructions[0xF9] = {"SBC", &Cpu::SBC, &Cpu::ABY, 4, true};
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_instructions[0xFD] = {"SBC", &Cpu::SBC, &Cpu::ABX, 4, true};
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_instructions[0x84] = {"STY", &Cpu::STY, &Cpu::ZP0, 3, false};
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_instructions[0x8C] = {"STY", &Cpu::STY, &Cpu::ABS, 4, false};
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_instructions[0x94] = {"STY", &Cpu::STY, &Cpu::ZPX, 4, false};
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_instructions[0xC8] = {"INY", &Cpu::INY, &Cpu::IMP, 2, false};
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_instructions[0xE8] = {"INX", &Cpu::INX, &Cpu::IMP, 2, false};
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_instructions[0xCA] = {"DEX", &Cpu::DEX, &Cpu::IMP, 2, false};
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_instructions[0xA8] = {"TAY", &Cpu::TAY, &Cpu::IMP, 2, false};
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_instructions[0xAA] = {"TAX", &Cpu::TAX, &Cpu::IMP, 2, false};
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_instructions[0x98] = {"TYA", &Cpu::TYA, &Cpu::IMP, 2, false};
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_instructions[0x8A] = {"TXA", &Cpu::TXA, &Cpu::IMP, 2, false};
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_instructions[0xBA] = {"TSX", &Cpu::TSX, &Cpu::IMP, 2, false};
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_instructions[0x40] = {"RTI", &Cpu::RTI, &Cpu::IMP, 6, false};
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_instructions[0x46] = {"LSR", &Cpu::LSR, &Cpu::ZP0, 5, false};
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_instructions[0x4E] = {"LSR", &Cpu::LSR, &Cpu::ABS, 6, false};
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_instructions[0x4A] = {"LSR", &Cpu::LSR_ACC, &Cpu::IMP, 2, false};
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_instructions[0x56] = {"LSR", &Cpu::LSR, &Cpu::ZPX, 6, false};
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_instructions[0x5E] = {"LSR", &Cpu::LSR, &Cpu::ABX, 7, false};
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_instructions[0x66] = {"ROR", &Cpu::ROR, &Cpu::ZP0, 5, false};
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_instructions[0x6A] = {"ROR", &Cpu::ROR_ACC, &Cpu::IMP, 2, false};
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_instructions[0x6E] = {"ROR", &Cpu::ROR, &Cpu::ABS, 6, false};
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_instructions[0x76] = {"ROR", &Cpu::ROR, &Cpu::ZPX, 6, false};
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_instructions[0x7E] = {"ROR", &Cpu::ROR, &Cpu::ABX, 7, false};
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_instructions[0x26] = {"ROL", &Cpu::ROL, &Cpu::ZP0, 5, false};
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_instructions[0x2A] = {"ROL", &Cpu::ROL_ACC, &Cpu::IMP, 2, false};
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_instructions[0x2E] = {"ROL", &Cpu::ROL, &Cpu::ABS, 6, false};
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_instructions[0x36] = {"ROL", &Cpu::ROL, &Cpu::ZPX, 6, false};
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_instructions[0x3E] = {"ROL", &Cpu::ROL, &Cpu::ABX, 7, false};
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_instructions[0xE6] = {"INC", &Cpu::INC, &Cpu::ZP0, 5, false};
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_instructions[0xEE] = {"INC", &Cpu::INC, &Cpu::ABS, 6, false};
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_instructions[0xF6] = {"INC", &Cpu::INC, &Cpu::ZPX, 6, false};
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_instructions[0xFE] = {"INC", &Cpu::INC, &Cpu::ABX, 7, false};
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_instructions[0xC6] = {"DEC", &Cpu::DEC, &Cpu::ZP0, 5, false};
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_instructions[0xCE] = {"DEC", &Cpu::DEC, &Cpu::ABS, 6, false};
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_instructions[0xD6] = {"DEC", &Cpu::DEC, &Cpu::ZPX, 6, false};
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_instructions[0xDE] = {"DEC", &Cpu::DEC, &Cpu::ABX, 7, false};
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}
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void Cpu::reset() {
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A = 0;
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X = 0;
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Y = 0;
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SP = 0xFD;
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flags = 0;
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uint16_t lo = _bus->read(0xFFFC);
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uint16_t hi = _bus->read(0xFFFD);
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PC = (hi << 8) | lo;
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_ticks = 8;
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}
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bool Cpu::tick() {
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bool executed = false;
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if(_ticks == 0) {
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uint8_t opcode = _bus->read(PC++);
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auto instruction = _instructions[opcode];
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_currentOpcode = opcode;
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if(instruction.getAddress == nullptr) {
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std::cout << "Unknown instruction: " << (int)opcode << std::endl;
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return false;
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}
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auto args = (this->*instruction.getAddress)();
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(this->*instruction.process)(args);
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_ticks += instruction.cycles;
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if(instruction.variableCycles) {
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_ticks += args.cycles;
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}
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executed = true;
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}
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_ticks--;
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return executed;
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}
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void Cpu::nmi() {
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_bus->write(STACK_BASE + SP--, PC >> 8);
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_bus->write(STACK_BASE + SP--, PC & 0x00FF);
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setFlag(Break, false);
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setFlag(Unused, true);
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setFlag(InterruptDisable, true);
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_bus->write(STACK_BASE + SP--, flags);
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uint8_t lo = _bus->read(0xFFFA);
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uint8_t hi = _bus->read(0xFFFB);
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PC = (hi << 8) | lo;
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_ticks = 8;
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}
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std::string Cpu::state() const {
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return std::format("{} ({:02X}), PC: {:X}, SP: {:X}, A: {:02X}, X: {:02X}, Y: {:02X}, [N:{}, V:{}, B{}, D{}, I{}, Z:{}, C:{}], H: {:08X}",
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_instructions[_currentOpcode].name,
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_currentOpcode,
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PC, SP, A, X, Y,
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(int)getFlag(Negative),
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(int)getFlag(Overflow),
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(int)getFlag(Break),
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(int)getFlag(DecimalMode),
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(int)getFlag(InterruptDisable),
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(int)getFlag(Zero),
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(int)getFlag(Carry),
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_bus->zpHash());
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}
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void Cpu::setFlag(CpuFlags flag, bool value) {
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if(value) {
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flags |= flag;
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} else {
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flags &= ~flag;
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}
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}
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bool Cpu::getFlag(CpuFlags flag) const {
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return flags & flag;
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}
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void Cpu::setStartAddress(uint16_t address) {
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PC = address;
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}
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Bus* Cpu::bus() const {
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return _bus.get();
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}
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void Cpu::branch(Cpu::InstructionArgs args) {
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_ticks++;
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uint16_t address = PC + args.address;
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uint16_t srcPage = PC & 0xFF00;
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uint16_t dstPage = address & 0xFF00;
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if(srcPage != dstPage) {
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_ticks++;
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}
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PC = address;
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}
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// Addressing modes
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Cpu::InstructionArgs Cpu::IMM() {
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return {PC++, 0};
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}
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Cpu::InstructionArgs Cpu::ABS() {
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uint8_t lo = _bus->read(PC++);
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uint8_t hi = _bus->read(PC++);
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uint16_t address = (hi << 8) | lo;
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return {address, 0};
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}
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Cpu::InstructionArgs Cpu::IMP() {
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return {0, 0};
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}
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Cpu::InstructionArgs Cpu::REL() {
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uint16_t address = _bus->read(PC++);
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if (address & 0x80) {
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address |= 0xFF00;
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}
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return {address, 0};
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}
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Cpu::InstructionArgs Cpu::ZP0() {
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uint16_t address = _bus->read(PC++);
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return {address, 0};
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}
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Cpu::InstructionArgs Cpu::IZX() {
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uint8_t ptrAddress = _bus->read(PC++) + X;
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uint8_t lo = _bus->read(ptrAddress);
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uint8_t hi = _bus->read(++ptrAddress);
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uint16_t address = (hi << 8) | lo;
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return {address, 0};
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}
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Cpu::InstructionArgs Cpu::IZY() {
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uint8_t ptrAddress = _bus->read(PC++);
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uint8_t lo = _bus->read(ptrAddress);
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uint8_t hi = _bus->read(++ptrAddress);
|
|
uint16_t address = (hi << 8) | lo;
|
|
address += Y;
|
|
|
|
uint8_t additionalCycles = 0;
|
|
if((address & 0xFF00) != (hi << 8)) {
|
|
additionalCycles = 1;
|
|
}
|
|
|
|
return {address, additionalCycles};
|
|
}
|
|
|
|
Cpu::InstructionArgs Cpu::IND() {
|
|
uint8_t ptrLo = _bus->read(PC++);
|
|
uint8_t ptrHi = _bus->read(PC++);
|
|
uint16_t ptrAddress = (ptrHi << 8) | ptrLo;
|
|
|
|
uint8_t lo = _bus->read(ptrAddress);
|
|
uint8_t hi = 0;
|
|
|
|
if(ptrLo == 0xFF) {
|
|
hi = _bus->read(ptrAddress & 0xFF00);
|
|
} else {
|
|
hi = _bus->read(++ptrAddress);
|
|
}
|
|
|
|
uint16_t address = (hi << 8) | lo;
|
|
return {address, 0};
|
|
}
|
|
|
|
Cpu::InstructionArgs Cpu::ABX() {
|
|
uint8_t lo = _bus->read(PC++);
|
|
uint8_t hi = _bus->read(PC++);
|
|
uint16_t address = (hi << 8) | lo;
|
|
address += X;
|
|
|
|
uint8_t additionalCycles = 0;
|
|
if((address & 0xFF00) != (hi << 8)) {
|
|
additionalCycles = 1;
|
|
}
|
|
|
|
return {address, additionalCycles};
|
|
}
|
|
|
|
Cpu::InstructionArgs Cpu::ABY() {
|
|
uint8_t lo = _bus->read(PC++);
|
|
uint8_t hi = _bus->read(PC++);
|
|
uint16_t address = (hi << 8) | lo;
|
|
address += Y;
|
|
|
|
uint8_t additionalCycles = 0;
|
|
if((address & 0xFF00) != (hi << 8)) {
|
|
additionalCycles = 1;
|
|
}
|
|
|
|
return {address, additionalCycles};
|
|
}
|
|
|
|
Cpu::InstructionArgs Cpu::ZPX() {
|
|
uint8_t address = _bus->read(PC++) + X;
|
|
return {address, 0};
|
|
}
|
|
|
|
Cpu::InstructionArgs Cpu::ZPY() {
|
|
uint8_t address = _bus->read(PC++) + Y;
|
|
return {address, 0};
|
|
}
|
|
|
|
// CPU instructions
|
|
|
|
void Cpu::LDA(Cpu::InstructionArgs args) {
|
|
A = _bus->read(args.address);
|
|
setFlag(Negative, A & 0x80);
|
|
setFlag(Zero, A == 0);
|
|
}
|
|
|
|
void Cpu::LDX(InstructionArgs args) {
|
|
X = _bus->read(args.address);
|
|
setFlag(Negative, X & 0x80);
|
|
setFlag(Zero, X == 0);
|
|
}
|
|
|
|
void Cpu::LDY(Cpu::InstructionArgs args) {
|
|
Y = _bus->read(args.address);
|
|
setFlag(Negative, Y & 0x80);
|
|
setFlag(Zero, Y == 0);
|
|
}
|
|
|
|
void Cpu::STA(Cpu::InstructionArgs args) {
|
|
_bus->write(args.address, A);
|
|
}
|
|
|
|
void Cpu::STX(InstructionArgs args) {
|
|
_bus->write(args.address, X);
|
|
}
|
|
|
|
void Cpu::CLC(Cpu::InstructionArgs args) {
|
|
setFlag(Carry, false);
|
|
}
|
|
|
|
void Cpu::ADC(Cpu::InstructionArgs args) {
|
|
uint16_t value = _bus->read(args.address);
|
|
uint16_t result = A + value + getFlag(Carry);
|
|
|
|
setFlag(Carry, result > 255);
|
|
setFlag(Zero, (result & 0xFF) == 0);
|
|
setFlag(Negative, result & 0x80);
|
|
setFlag(Overflow, (~(A^value) & (A^result)) & 0x80);
|
|
|
|
A = result & 0xFF;
|
|
}
|
|
|
|
void Cpu::SBC(Cpu::InstructionArgs args) {
|
|
uint16_t value = _bus->read(args.address) ^ 0xFF;
|
|
uint16_t result = A + value + getFlag(Carry);
|
|
|
|
setFlag(Carry, result > 255);
|
|
setFlag(Zero, (result & 0xFF) == 0);
|
|
setFlag(Negative, result & 0x80);
|
|
setFlag(Overflow, (~(A^value) & (A^result)) & 0x80);
|
|
|
|
A = result & 0xFF;
|
|
}
|
|
|
|
void Cpu::DEY(Cpu::InstructionArgs args) {
|
|
Y--;
|
|
setFlag(Negative, Y & 0x80);
|
|
setFlag(Zero, Y == 0);
|
|
}
|
|
|
|
void Cpu::BNE(Cpu::InstructionArgs args) {
|
|
if(!getFlag(Zero)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::NOP(Cpu::InstructionArgs args) {
|
|
}
|
|
|
|
void Cpu::SEI(Cpu::InstructionArgs args) {
|
|
setFlag(InterruptDisable, true);
|
|
}
|
|
|
|
void Cpu::CLD(Cpu::InstructionArgs args) {
|
|
setFlag(DecimalMode, false);
|
|
}
|
|
|
|
void Cpu::TXS(Cpu::InstructionArgs args) {
|
|
SP = X;
|
|
}
|
|
|
|
void Cpu::BPL(Cpu::InstructionArgs args) {
|
|
if(!getFlag(Negative)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::JMP(Cpu::InstructionArgs args) {
|
|
PC = args.address;
|
|
}
|
|
|
|
void Cpu::JSR(Cpu::InstructionArgs args) {
|
|
PC--;
|
|
_bus->write(STACK_BASE + SP--, PC >> 8);
|
|
_bus->write(STACK_BASE + SP--, PC & 0x00FF);
|
|
PC = args.address;
|
|
}
|
|
|
|
void Cpu::SEC(Cpu::InstructionArgs args) {
|
|
setFlag(Carry, true);
|
|
}
|
|
|
|
void Cpu::BCS(Cpu::InstructionArgs args) {
|
|
if(getFlag(Carry)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::BCC(Cpu::InstructionArgs args) {
|
|
if(!getFlag(Carry)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::BEQ(Cpu::InstructionArgs args) {
|
|
if(getFlag(Zero)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::BIT(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
setFlag(Zero, (A & value) == 0);
|
|
setFlag(Negative, value & (1 << 7));
|
|
setFlag(Overflow, value & (1 << 6));
|
|
}
|
|
|
|
void Cpu::BVS(Cpu::InstructionArgs args) {
|
|
if(getFlag(Overflow)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::BVC(Cpu::InstructionArgs args) {
|
|
if(!getFlag(Overflow)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::RTS(Cpu::InstructionArgs args) {
|
|
uint16_t lo = _bus->read(STACK_BASE + ++SP);
|
|
uint16_t hi = _bus->read(STACK_BASE + ++SP);
|
|
|
|
PC = (hi << 8) | lo;
|
|
PC++;
|
|
}
|
|
|
|
void Cpu::SED(Cpu::InstructionArgs args) {
|
|
setFlag(DecimalMode, true);
|
|
}
|
|
|
|
void Cpu::PHP(Cpu::InstructionArgs args) {
|
|
_bus->write(STACK_BASE + SP--, flags | Break | Unused);
|
|
setFlag(Break, false);
|
|
setFlag(Unused, false);
|
|
}
|
|
|
|
void Cpu::PLA(Cpu::InstructionArgs args) {
|
|
A = _bus->read(STACK_BASE + ++SP);
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::AND(Cpu::InstructionArgs args) {
|
|
A &= _bus->read(args.address);;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::CMP(Cpu::InstructionArgs args) {
|
|
uint16_t value = _bus->read(args.address);
|
|
uint16_t diff = A - value;
|
|
setFlag(Carry, A >= value);
|
|
setFlag(Zero, (diff & 0x00FF) == 0);
|
|
setFlag(Negative, diff & 0x0080);
|
|
}
|
|
|
|
void Cpu::BMI(Cpu::InstructionArgs args) {
|
|
if(getFlag(Negative)) {
|
|
branch(args);
|
|
}
|
|
}
|
|
|
|
void Cpu::PHA(Cpu::InstructionArgs args) {
|
|
_bus->write(STACK_BASE + SP--, A);
|
|
}
|
|
|
|
void Cpu::PLP(Cpu::InstructionArgs args) {
|
|
flags = _bus->read(STACK_BASE + ++SP);
|
|
setFlag(Unused, true);
|
|
}
|
|
|
|
void Cpu::ORA(Cpu::InstructionArgs args) {
|
|
A |= _bus->read(args.address);
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::CLV(Cpu::InstructionArgs args) {
|
|
setFlag(Overflow, false);
|
|
}
|
|
|
|
void Cpu::EOR(Cpu::InstructionArgs args) {
|
|
A ^= _bus->read(args.address);
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::CPY(Cpu::InstructionArgs args) {
|
|
uint16_t value = _bus->read(args.address);
|
|
uint16_t diff = Y - value;
|
|
setFlag(Carry, Y >= value);
|
|
setFlag(Zero, (diff & 0x00FF) == 0);
|
|
setFlag(Negative, diff & 0x0080);
|
|
}
|
|
|
|
void Cpu::CPX(Cpu::InstructionArgs args) {
|
|
uint16_t value = _bus->read(args.address);
|
|
uint16_t diff = X - value;
|
|
setFlag(Carry, X >= value);
|
|
setFlag(Zero, (diff & 0x00FF) == 0);
|
|
setFlag(Negative, diff & 0x0080);
|
|
}
|
|
|
|
void Cpu::STY(Cpu::InstructionArgs args) {
|
|
_bus->write(args.address, Y);
|
|
}
|
|
|
|
void Cpu::INY(Cpu::InstructionArgs args) {
|
|
Y++;
|
|
setFlag(Zero, Y == 0);
|
|
setFlag(Negative, Y & 0x80);
|
|
}
|
|
|
|
void Cpu::INX(Cpu::InstructionArgs args) {
|
|
X++;
|
|
setFlag(Zero, X == 0);
|
|
setFlag(Negative, X & 0x80);
|
|
}
|
|
|
|
void Cpu::DEX(Cpu::InstructionArgs args) {
|
|
X--;
|
|
setFlag(Zero, X == 0);
|
|
setFlag(Negative, X & 0x80);
|
|
}
|
|
|
|
void Cpu::TAY(Cpu::InstructionArgs args) {
|
|
Y = A;
|
|
setFlag(Zero, Y == 0);
|
|
setFlag(Negative, Y & 0x80);
|
|
}
|
|
|
|
void Cpu::TAX(Cpu::InstructionArgs args) {
|
|
X = A;
|
|
setFlag(Zero, X == 0);
|
|
setFlag(Negative, X & 0x80);
|
|
}
|
|
|
|
void Cpu::TYA(Cpu::InstructionArgs args) {
|
|
A = Y;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::TXA(Cpu::InstructionArgs args) {
|
|
A = X;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::TSX(Cpu::InstructionArgs args) {
|
|
X = SP;
|
|
setFlag(Zero, X == 0);
|
|
setFlag(Negative, X & 0x80);
|
|
}
|
|
|
|
void Cpu::BRK(Cpu::InstructionArgs args) {
|
|
PC++;
|
|
setFlag(InterruptDisable, true);
|
|
|
|
_bus->write(STACK_BASE + SP--, PC >> 8);
|
|
_bus->write(STACK_BASE + SP--, PC & 0x00FF);
|
|
|
|
setFlag(Break, true);
|
|
_bus->write(STACK_BASE + SP--, flags);
|
|
setFlag(Break, false);
|
|
|
|
uint16_t lo = _bus->read(0xFFFE);
|
|
uint16_t hi = _bus->read(0xFFFF);
|
|
PC = (hi << 8) | lo;
|
|
}
|
|
|
|
void Cpu::RTI(Cpu::InstructionArgs args) {
|
|
flags = _bus->read(STACK_BASE + ++SP);
|
|
setFlag(Break, false);
|
|
setFlag(Unused, false);
|
|
|
|
uint16_t lo = _bus->read(STACK_BASE + ++SP);
|
|
uint16_t hi = _bus->read(STACK_BASE + ++SP);
|
|
PC = (hi << 8) | lo;
|
|
}
|
|
|
|
void Cpu::LSR_ACC(Cpu::InstructionArgs args) {
|
|
setFlag(Carry, A & 0x01);
|
|
A = A >> 1;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::LSR(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
setFlag(Carry, value & 0x01);
|
|
value = value >> 1;
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
_bus->write(args.address, value);
|
|
}
|
|
|
|
void Cpu::ASL_ACC(Cpu::InstructionArgs args) {
|
|
setFlag(Carry, A & 0x80);
|
|
A = A << 1;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::ASL(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
setFlag(Carry, value & 0x80);
|
|
value = value << 1;
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
_bus->write(args.address, value);
|
|
}
|
|
|
|
void Cpu::ROR_ACC(Cpu::InstructionArgs args) {
|
|
uint8_t carryOriginal = getFlag(Carry);
|
|
setFlag(Carry, A & 0x01);
|
|
A = (A >> 1) | (carryOriginal << 7);
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::ROR(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
uint8_t carryOriginal = getFlag(Carry);
|
|
setFlag(Carry, value & 0x01);
|
|
value = (value >> 1) | (carryOriginal << 7);
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
_bus->write(args.address, value);
|
|
}
|
|
|
|
void Cpu::ROL_ACC(Cpu::InstructionArgs args) {
|
|
uint8_t carryOriginal = getFlag(Carry);
|
|
setFlag(Carry, A & 0x80);
|
|
A = (A << 1) | carryOriginal;
|
|
setFlag(Zero, A == 0);
|
|
setFlag(Negative, A & 0x80);
|
|
}
|
|
|
|
void Cpu::ROL(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
uint8_t carryOriginal = getFlag(Carry);
|
|
setFlag(Carry, value & 0x80);
|
|
value = (value << 1) | carryOriginal;
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
_bus->write(args.address, value);
|
|
}
|
|
|
|
void Cpu::INC(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
_bus->write(args.address, ++value);
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
}
|
|
|
|
void Cpu::DEC(Cpu::InstructionArgs args) {
|
|
uint8_t value = _bus->read(args.address);
|
|
_bus->write(args.address, --value);
|
|
setFlag(Zero, value == 0);
|
|
setFlag(Negative, value & 0x80);
|
|
}
|
|
|
|
}
|